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why the NTAG NT3H1101 is sending NACK unstead of ACK?

Question asked by tarik ah on Jul 25, 2017
Latest reply on Jul 31, 2017 by Kan_Li

hello everyone,

As I am using the NTAG NT3H1101  with MSP430 and trying to interface it with I2C, i am having problem of the behavior of the NTAG. From the datasheet it says that if i send START condition with the Right Slave Address(0x55), i should receive an ACK from the NTAG. but, the NATG is just holding low the 9th clock(there is no 9th clock).

whenever i send a wrong address i see the 9th clock with the whole data sent.

From the side of the MSP430, it says that the START condition clears after receiving a ACK from the NTAG,which never happens and my code stuckes at line where i made a check to makke sure i received the NACK.while (UCB0CTL1 & UCTXSTT);  

can you please tell me why the NTAG is not behaving accordingly?

 

#include /* * main.c */

//***declaration of global variable***************************

unsigned char *ptrRx;

unsigned char RXData[16];

unsigned char RXByte;

int main(void) {

WDTCTL = WDTPW + WDTHOLD;//Stop the WDT to prevent reset

BCSCTL1 = CALBC1_16MHZ; // Set DCO to 16MHz

DCOCTL = CALDCO_16MHZ;

//initialization

// configure P3.1(SDA) an P3.2(SCL) for I2C

P3SEL |=BIT1|BIT2;

P3SEL2 &=~(BIT1|BIT2);

UCB0CTL1 |=UCSWRST; //Ensure that the USCI_B0 is reset before the configuration

UCB0CTL1 &=~UCSLA10; //slve address with 7 bit

UCB0CTL0 |=UCMST|UCMODE_3|UCSYNC; //set the MSP430 to master mode

UCB0CTL1|=UCSSEL_3|UCSWRST; //take USCi clock source from SMCLK //configure the baud rate registers for 100Khz when sourcing from SMCLK,SMCLK=16Mhz UCB0BR0 =64; //lower byte of UCBRx

UCB0BR1 =2;

UCB0CTL1 &=~UCSWRST; // Clear SW reset, take the USCI module out of reset

UCB0I2CSA =0x55; //writing the slave address

IE2 |=UCB0RXIE; // enable Rx interrupt //

__delay_cycles(60000);

while(1){

unsigned char i;//

UCTR =~R/W //slave address of the NTAG NFC //

UCB0TXBUF=0x01;

UCB0CTL1 |=UCTR|UCTXSTT; //transmitter,I2C start condition

while (UCB0CTL1 & UCTXSTT); // Ensure START condition got sent //send memory address

UCB0TXBUF=0x01;

while ((UCB0CTL1 & UCTXSTT) && (!(IFG2 & UCB0TXIFG))); // Ensure START condition got sent and memory address is being read

UCB0CTL1 |=UCTXSTP; //stop condition

UCB0CTL1 &=~UCTR; //receiver mode

UCB0CTL1 |= UCTXSTT; // I2C start condition //receiver mode

__bis_SR_register(LPM0 | GIE); // Enter LPM0 w/ interrupt

for(i=0;i<16;i++){

while(!(IFG2 & UCB0RXIFG)); //wait till we receive the data

*ptrRx=RXByte;

ptrRx++;

if(i==1)

{ UCB0CTL1 |=UCTXSTP; //stop reception

}

}

}

}

#pragma vector = USCIAB0RX_VECTOR

__interrupt void USCIAB0RX_ISR(void) {

//clear interrrupt flag

RXByte = UCB0RXBUF; // Get RX data

__bic_SR_register_on_exit(LPM0); // Exit LPM0

}

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