MIPI Camera Sony MA130

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MIPI Camera Sony MA130

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pierre-olivierh
Contributor III

Hello,

I'm currently trying to connect a MA130 Sony Camera (I suspect it's a imx135 camera module) to an iMX6Q via MIPI.

I based my driver on the ov5640_mipi. The MIPI side seems to works fine but the IPU/CSI don't.

I would like to have some thoughts on my configuration. The camera outputs 1080p30 video, YUV422, 81MHz pixel clock, MIPI on 2 lanes. I'm connected to the Virtual channel 0 (I think, I don't have the confirmation) on  IPU1 CSI0

This is how I calculated the MIPI clock (for MIPI_CSI2_PHY_TST_CTRL1), using chapter 3.4 of this document:

- 1920*1080*30*1cycle/pixel*blanking = 81MHz -> blanking = 1.24 (coherent)

- MIPI data Rate: 81MHz*16bits = 1296Mb/s

- MIPI Clock: 1296/2/2 = 324MHz (like the datasheet)

- MIPI_CSI2_PHY_TST_CTRL1= 324*2=648MHz register = 0x10

When I start the driver, I got these registers:

MIPI_CSI_PHY_STATE 0x200

MIPI_CSI_ERR1  0x0

MIPI_CSI_ERR2 0x0

Everything seems fine for the MIPI side.

About the IPU

IPU ID = 0, CSI ID = 0
IPU_CONF = 0x10000661

-> CSI_SEL to CSI0, CSI0_DATA_SOURCE, CSI0 enabled
CSI_SENS_CONF = 0x00008A00  (// I tested 0x00008A20 with no success : Gated vs bt656)
CSI_SENS_FRM_SIZE = 0x0437077F //1920*1080
CSI_ACT_FRM_SIZE = 0x0437077F //1920*1080
CSI_OUT_FRM_CTRL = 0x00000000
CSI_TST_CTRL = 0x00000000
CSI_CCIR_CODE_1 = 0x00040030
CSI_CCIR_CODE_2 = 0x00000000
CSI_CCIR_CODE_3 = 0x00FF0000

I configured the pixelformat like the OV5640 : V4L2_PIX_FMT_UYVY,

iftype=V4L2_IF_TYPE_BT656

mode=V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT

When I start a gstreamer pipeline I still get the same error:

    v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0

Did you see any misconfiguration?

Best regards,

Pierre-Olivier

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igorpadykov
NXP Employee
NXP Employee

Hi Pierre-Olivier

for two lanes correct MIPI_CSI_PHY_STATE is 0x330, 

the value is jump between 0x330 and 0x300). May be useful to check
Debug steps for customer MIPI sensor.docx 

Best regards
igor
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igorpadykov
NXP Employee
NXP Employee

Hi Pierre-Olivier

for two lanes correct MIPI_CSI_PHY_STATE is 0x330, 

the value is jump between 0x330 and 0x300). May be useful to check
Debug steps for customer MIPI sensor.docx 

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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pierre-olivierh
Contributor III

Thank you for the tip, I have found a thread about that : https://community.nxp.com/thread/356082

 

Now the register MIPI_CSI_PHY_STATE=0x300 or 0x330, but the ERR1 register is 0x3 now. Did I misconfigured the clock?

Edit :The TEST_CTRL1 register was not correctly set. I have an image now, but it flickers and it's mainly yellow. Any Thoughts?

 

Edit2: Misconfiguration in ipu_capture, I have the imge, but there is a strang behavior: at first start everything is ok, then if a restart the pipeline, I got IPU_INT_STAT_10=0x00000001 and the image is rolling.

I suspect the IPU_CSI_CLK_MODE_NONGATED_CLK, any thoughts?

Best regards

Pierre-Olivier

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