I'm looking at Rev 8.0 of the PF3000 PMIC data sheet and I can't find any specification of the LDO regulator output discharge resistance value. Figure 13 in section 6.3.10 shows a discharge resistor + MOSFET combination to enable discharging of the output and the text says "when a regulator is disabled, the output is discharged by an internal pull-down resistor". The discharge resistor for the switching buck regulators is specified as 600 ohms typical, but there is no similar specification for the LDO regulators in their static electrical characteristics. What is the typical LDO discharge resistance?
We are using the "A1" variation of the PF3000 and when the PMIC is turned off (PWRON transitions from 1 to 0), the V33 LDO output take 3 to 4 seconds to decay because it is lightly loaded. This seems to imply that the discharge resistor on this LDO output is not active when the PMIC is in the OFF state. If this is true, are individual power supplies to be disabled prior to final power off via the PWRON signal so that they have a chance to discharge through the activated discharge resistance?