The reference manual for the i.MX 6UltraLite on page 872 in the ENET1 External Signals section says there is a 25 MHz Reference Clock on GPIO1_IO03 ALT2.
"SW_MUX_CTL_PAD_GPIO1_IO03 SW MUX Control Register"
ALT 2 is not the REF CLK
There in the 25Mhz Ref CLK in
"SW_MUX_CTL_PAD_GPIO1_IO02 SW MUX Control Register"
Could you please clarify what pin i can generate a 25Mhz clock for my ENET PHY