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Constant COP Reset

Question asked by Robert Maier on Jul 5, 2017
Latest reply on Jul 7, 2017 by Robert Maier

I am trying to help a colleague who is writing in ASM try to debug a persistent reset. It happens at 16.xxx seconds like clock work. The unit runs for 16 seconds, triggers a reset and runs for another 16s. The reset appears to be caused by the COP watchdog. We are using an MC9S12P MCU. The code is applied from an existing platform that has been working for some time. Basically the same platform with more I/O. So, we are confused as to why we are seeing problems here. The MCU is running at 16 MHz.

 

I am not sure where to start. So, I will begin with the clock initialization. Here's the code snippet.

 

ldaa       #$26            ; old. Allow access to CPU clock settings    
staa       CPMUPROT
movb                                   #%10000011,CPMUCLKS    ; turn on PLL. Run RTI from OSCCLK  
movb       #%00000000,CPMUHTCTL   ; not reading the internal temp sensor
movb       #%00001111,CPMUSYNR    ; set the freq reduction to obtain F-ref
movb       #%00001111,CPMUREFDIV  ; set divider to get F-ref from crystal freq
movb       #%00000000,CPMUPOSTDIV
movb       #%11000001,CPMUOSC     ; turn on the external oscillator 
ldaa       #1
staa                                   CPMUPROT

 

We have tried writing 0x00 to the CPMUCOP to no avail. We are a little confused as to the statement in the COP Control Register Description stating "When a non-zero value is loaded from Flash to CR[0:2] the COP time-out period is started." Where in flash is this value, and how do you change it?

 

A vague question will get a vague answer, but I hope it will move us in the right direction. Thanks!

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