I am about to select a NAND flash for a hardware design based on the i.MX7D.
What is throwing me off is the Flashs "ECC requirement" of either 1 or 4 bits.
From what I read in the MX7 datasheet, BCH performs ECC calculations for NAND operations and supports 2...62 bit ECC. Does this limit my NAND selection to 4-bit ECC versions?
If the selection is not limited, would you recommend 1- or 4-bit ECC? Never worked with NAND before so I am wondering if there are any (dis)advantages to either solution.