Dear Sir or Madam,
I need to identify Data input setup and hold time for DDR4 interface of LS1021A. In its datasheet under Table 29 ( DDR3L and DDR4 SDRAM interface input AC timing specifications) timing parameter tDISKEW (Tolerated skew for MDQS-MDQ/MECC) has been mentioned as -200ps(min.) and +200ps(max.) for 1600 MT/s data rate. So can i take the input data setup time and hold time as,((0.5 * tCK) - (2 * tDISKEW)) / 2 = 112.5ps (min.) respectively?
Thanking you in advance.