I'm going to run dual-core LS1020A. Core 0 startsup from the location, written into SCRATCHRW1 - that's fine. But what about core 1 startup location after releasing it? Will it jump to the same location?
I didn't find it documented.
The LS1021a Core 0 is enabled using the RCW[BOOT_HO] bit.
The LS1021a Core 0 uses software for setting the Boot Location Pointer for core 1 via the SCRATCHRW1 register and enabling Core 1 using the DCFG_CCSR_BRR register.
See the following pages:
https://lists.denx.de/pipermail/u-boot/2014-November/196577.html
or
Have a great day,
Pavel Chubakov
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