Hello community,
My customer ask us about power up sequence of PF0100 PMIC.
In short cycle power off -> on sequence, capacitor are not discharged and keep some voltage.
After PWRON is enabled, LDO output are seems discharged, but Buck regulators output voltage are keeping.
Attached picture is a waveform of PF0100 on SABRE-SDB board(Ch1:VGEN5, Ch3: PWRON, Ch4:SW2).
Ch1(VGEN5) seems to discharge. betweenn PWRON enable and VGEN5 enable.
But Ch4(SW2) seems keep charged voltage and sink to GND very short time befor SW2 enable.
Is this correct function of PF0100 SW2 output?
Our customer connect SW2 output not olny IMX6Q but also other device(sub MCU).
But cycle time to sink to GND is shorter, so some board can not restart MCU.
Does it have a method to sink it to discharge SW2 output?
Best regards,
Ishii.
Hi Ishii
according to Figure 6. Default start-up sequence MMPF0100 datasheet
power supplies should be started from zero, there should not be any
voltages applied to regulators, externally or through not discharged capacitors.
http://www.nxp.com/docs/en/data-sheet/MMPF0100.pdf
Behaviour beyond those conditions is not specified, sorry.
Best regards
igor
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Hi, Igor
Thank you for your answer.
And sorry for my late response.
In this document ”MMPF0100.pdf”, it have some discharged logic in this device.
Don't you have any method to enable these discharge logic?
Best regards,
Ishii.
Hi Ishii
unfortunately there is no software control for discharging logic
Best regards
igor
Hello, Igor
Thank you for your answer.
I will answer it to customer.
Best regards,
Ishii.