Move from MKL02Z32VFM4 to MKL02Z32VFK4 - No GPIO

[simonainsley]

I have a small application running on the FRDM-KL02Z dev board - all is well. App uses 10 or so IO, mostly configured as GPIO.

For our own board we move to 24 pin version of the chip.

On our own board, I can connect and download code over SWD, and code appears to be running  - I get successful debug print output, and said output is dependent on timer running, so code and peripherals are obviously running OK.

I have, however, no GPIO activity at all. All GPIO defined as outputs appear to be sat around 0.3V, and inputs do not respond to changes.

All port settings appear to be OK.

I notice that on FRDM board that the centre pad is connected to 0V, whereas mine is not connected (there appears to be no reference to it at all in the datasheet - certainly searching for 'pad' or 'pin' does not find anything. Could this be related?

Any other reasons why I might have no GPIO but a running chip.

Thanks

SCA

[kerryzhou]

Hello Simon Ainsley,

   Thank you for your interest in NXP Kinetis product, I would like to provide service for you.

If you are convenient, could you please also provide your own board schematic for us?
The central pad is the thermal pad, it is a good thermal path to the board, it is just for heat sinking of silicon chip, so you don't need to connect it to ground.
Now, I need to check your schematic at first.
You also can check your schematic, especially pin 4 and pin3 , did you connect it to the ground and 3.3V, and whether the pin solder is OK on these pads? Check the solder, whether there some Dry Joint.
Waiting for your reply!

Have a great day,
Kerry

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[simonainsley]

Hello,

Schematic attached.

Pin 4, 3 connected fine, joints checked under microscope.

As I said, I have code running on the chip, so there's obviously power

getting there.

Thanks

SImon Ansley

[kerryzhou]

Hello Simon Ainsley,

   After check your schematic, these points need to take care:

1. VDD voltage

   In your schematic, I find your VDD/VREFH is +5V symbol, the max voltage of VDD is 3.6V, it should be 1.71 to 3.6V.

  But it seems you are using 78L33, so the U3 output should be 3.3V. If you are really using 78l33, the vdd voltage won't be the problem.

2. PTB5, this is the NMI pin in default

   If external put it in low, your code will enter in the NMI interrupt.

  Take care, this is very important. You must make sure your code didn't enter NMI interrupt, or run to the hardfault.

3. Reset pin, PTA1

   This pin you need to add external 4.7K to 10K pull up resistor, and 0.1uf capacitor to ground.

 4. Did you test the GPIO when do the debugging?

  Take an example, you set a GPIO to high and low in debug mode, and check the GPIO register, and the register really works OK, then test the hardware GPIO, don't exit the debug mode.

Whether this method can work?

  Please also tell me what the IDE you are using?

If you are using the CW, please check the librarian model, you need to select ewl, just like the following picture:

If you still have problem, send me your test project, I will check it on my side at first.

Have a great day,
Kerry

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------