Problems about LAN8720a in u-boot-2009.08

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Problems about LAN8720a in u-boot-2009.08

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sunnyvan
Contributor II
Hi,
I use LAN8720A and RMII connection to IMX6Q and it works well in kernel 3.10.35,but it does't work in u-boot-2009.08.
when I ping my host,it replies as follows:
MX6Q SABRESD U-Boot > ping 192.168.2.101 
ping failed; host 192.168.2.101 is not alive
MX6Q SABRESD U-Boot > ping 192.168.2.101   
fec_mii_phy_init: info->phy_addr=0x0   
fec_init: info->phy_addr=0x0       
FEC: Link is Up 782d       
Using FEC0 device  
ping failed; host 192.168.2.101 is not alive
MX6Q SABRESD U-Boot > mii device           
MII devices: 'FEC0'            
Current device: 'FEC0'
MX6Q SABRESD U-Boot > mii dump
Error reading from the PHY addr=00 reg=00

I can't read or write registers by mii read or mii write,it also replies
Error reading from the PHY addr=00 reg=00
My env variables are as follows:
  "netdev=eth0\0"      \
  "ethprime=FEC0\0"     \
  "uboot=u-boot.bin\0"   \
  "kernel=uImage\0"    \
  "ethaddr=1E:ED:19:27:1A:B3\0" \
  "nfsroot=/home/van/nfsroot\0"    \
  "bootargs_base=setenv bootargs console=ttymxc0,115200\0"\
  "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs "\
   "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0"\
  "bootcmd_net=run bootargs_base bootargs_nfs; "  \
   "tftpboot ${loadaddr} ${kernel}; bootm\0" \
  "bootargs_mmc=setenv bootargs ${bootargs} ip=none "     \
   "root=/dev/mmcblk0p1 rootwait video=mxcfb0:dev=ldb,LDB-XGA,if=RGB666 ldb=sep0\0"                \
  "bootcmd_mmc=run bootargs_base bootargs_mmc; "   \
  "mmc dev 2; " \
  "mmc read ${loadaddr} 0x800 0x2000; bootm\0" \
  "bootcmd=run bootcmd_mmc\0"                            \
  "update_uboot=tftpboot ${loadaddr} u-boot.bin; sf probe 1; sf erase 0 0x80000; sf write ${loadaddr} 0 0x80000\0"   \
  "splashimage=0x30000000\0" \
  "splashpos=m,m\0" \
  "lvds_num=1\0"
Seen below for my schematic diagram:
2.JPG
3.JPG
1.JPG
and the enet_pads table is as follows:
iomux_v3_cfg_t enet_pads[] = {
#ifdef CONFIG_ENET_RMII
 /* ENET (10/100Mbps enet interface)*/
 MX6Q_PAD_ENET_MDIO__ENET_MDIO,
 MX6Q_PAD_ENET_MDC__ENET_MDC,
 MX6Q_PAD_ENET_CRS_DV__ENET_RX_EN,
 MX6Q_PAD_ENET_RX_ER__ENET_RX_ER,
 MX6Q_PAD_ENET_TX_EN__ENET_TX_EN,
 MX6Q_PAD_ENET_RXD0__ENET_RDATA_0,
 MX6Q_PAD_ENET_RXD1__ENET_RDATA_1,
 MX6Q_PAD_ENET_TXD0__ENET_TDATA_0,
 MX6Q_PAD_ENET_TXD1__ENET_TDATA_1, 
 MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT,
 MX6Q_PAD_ENET_REF_CLK__GPIO_1_23, /* reset phy */
#endif
#define CONFIG_ENET_RMII
#define CONFIG_FEC0_IOBASE ENET_BASE_ADDR
#define CONFIG_FEC0_PINMUX  -1
#define CONFIG_FEC0_MIIBASE  -1
#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
#define CONFIG_MXC_FEC
#define CONFIG_FEC0_PHY_ADDR  0xFF
#define CONFIG_DISCOVER_PHY
#define CONFIG_ETH_PRIME
#define CONFIG_RMII
#define CONFIG_CMD_MII
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
#define CONFIG_IPADDR   192.168.2.103
#define CONFIG_SERVERIP   192.168.2.105
and the reset function is :
 gpio_direction_output(FEC_PHY_RESET, 0);
 udelay(5000);
 gpio_set_value(FEC_PHY_RESET, 1);
 /* Set GPIO_16 output for RMII reference clock
  * For MX6 GPR1 bit21 meaning:
  * Bit21:       1 - GPIO_16 pad output
  *              0 - GPIO_16 pad input
  * Use interal clock, set GPIO_16 output, and
  * then force input(set SION)
  * Use exteral clock, set GPIO_16 input, and
  * don't set SION bit.
  */
 mxc_iomux_set_gpr_register(1, 21, 1, 1);


I can measure 50MHZ waveform on GPIO_16.The default PHY is for AR8031,how can modify the codes for LAN8720A in u-boot-2009.08?Is there any patches for this?
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igorpadykov
NXP Employee
NXP Employee

Hi SUNNY

please check rmii patch (https://community.nxp.com/servlet/JiveServlet/download/398432-1-274101/MX6_enet_RMII.zip ) on

https://community.nxp.com/thread/304346?commentID=331971#comment-331971 

Best regards
igor
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sunnyvan
Contributor II

hi,igor

I've patched it, but it doesn't work. Do you have any other idea about it?

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