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LPTMR does not always stay enabled in VLLS3

Question asked by Joop aan den Toorn on Jun 23, 2017
Latest reply on Jun 28, 2017 by Joop aan den Toorn

I am working on a low-power project with a MKL02Z32 processor, and I added a 32k crystal to the MCU in order to wake it up from VLLS3 every 10s using the OSC and LPTMR module. It is important the clock source is very stable w.r.t. temperature and age, which is why I opted for this rather than the LPO 1KHz timer. The device is configured for 12MHz cpu and 6MHz bus speed while awake.

 

The whole things works fine using the LPO timer instead of OSC, for any interval really. When I use the crystal, however, I need some delay after any wake-up before re-entering VLLS3, or the LPTMR will simply never trigger an interrupt to wake the device up again.

 

I have verified the OSC remains enabled in VLLS3. Also the LPTMR settings remain unchanged after initial settings are written after a POR (also when having this issue the settings itself are fine). I tried just scanning the LPTMR counter value to at least have counted to 1 before re-entering VLLS3, but still, for some faster modes (i.e. prescaler bypassed or low value) the LPTMR will never trigger an interrupt. If I add some artificial delay of 170ms before re-entering VLLS3, everything works fine.

 

The tricky part would be that the OSC resets with every wake-up and needs to be reconfigured + the isolation ackn bit has to be set. I measured the XTAL signal with an oscilloscope, there is no 'break' in the oscillation, seems to be perfectly continuous while the device is waking up.

 

Does anybody know of a delay or synchronization procedure (that is not described in the KL02 Sub-Family Reference Manual or Power Management for Kinetis MCUs AN4503) I might have skipped? Or did I miss something else? I do not understand why a relatively long delay of 175ms would magically solve the problem.

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