Question about basic Low power control register of A 7 platform (GPC_LPCR_A 7 _ BSC).

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Question about basic Low power control register of A 7 platform (GPC_LPCR_A 7 _ BSC).

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ko-hey
Senior Contributor II

Question about basic Low power control register of A 7 platform (GPC_LPCR_A 7 _ BSC) in i.MX7D.


There is a note "PCR_A7 _ BSC [CPU_CLK_ON_LPM] should be set 1 'b 1 when using A 7 low power debug feature" on page 841 of the reference manual.

Q1
What does this "low power debug feature" mean ?

Q2

If user ser 1b'0 to the PCR_A7 _ BSC [CPU_CLK_ON_LPM] register, the clock supply to A7 core will stop on wait/stop mode.

Is my understanding correct ?

Ko-hey

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Yuri
NXP Employee
NXP Employee

Hello,

  low power debug feature means using debugging under low power modes.

If A7 core clock is disabled - debugging is not possible, so the clock

should be enabled.

Have a great day,
Yuri

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