Evgeny Erenburg

ENET on K70

Discussion created by Evgeny Erenburg on Jun 20, 2017
Latest reply on Jul 4, 2017 by Evgeny Erenburg

I have TWR-K70F120M + TWR-SER. 

The question - how to configure ENET and PHY?

The PHY on TWR-SER board is KSZ8041NL. I did the following settins

void enet_start_mii(int phy_addr)
{
    unsigned int periph_clk_mhz = 60;
    int data;


    /*FSL: start MII interface*/
    mii_init(0, periph_clk_mhz);
    
    /* Can we talk to the PHY? */
    do
    {
        data = 0xffff;
        mii_read( 0, phy_addr, PHY_PHYIDR1, &data);
    } while( data == 0xffff );
    
    /* Start auto negotiate. */
    mii_write( 0, phy_addr, PHY_BMCR, (PHY_BMCR_AN_RESTART | PHY_BMCR_AN_ENABLE) ); 
}

 

Is it enough for PHY?

 

For ENET -  I'm not sure how to configure the module. I can configure pins

 

/* Enable the ENET clock. */
    SIM_SCGC2 |= SIM_SCGC2_ENET1_MASK;
 
    PORTB_PCR0  = PORT_PCR_MUX(4);//GPIO;//RMII0_MDIO/MII0_MDIO
    PORTB_PCR1  = PORT_PCR_MUX(4);//GPIO;//RMII0_MDC/MII0_MDC    

 

    #if configUSE_MII_MODE
    PORTA_PCR14 = PORT_PCR_MUX(4);//RMII0_CRS_DV/MII0_RXDV
    //PORTA_PCR5  = PORT_PCR_MUX(4);//RMII0_RXER/MII0_RXER
    PORTA_PCR12 = PORT_PCR_MUX(4);//RMII0_RXD1/MII0_RXD1
    PORTA_PCR13 = PORT_PCR_MUX(4);//RMII0_RXD0/MII0_RXD0
    PORTA_PCR15 = PORT_PCR_MUX(4);//RMII0_TXEN/MII0_TXEN
    PORTA_PCR16 = PORT_PCR_MUX(4);//RMII0_TXD0/MII0_TXD0
    PORTA_PCR17 = PORT_PCR_MUX(4);//RMII0_TXD1/MII0_TXD1
    PORTA_PCR11 = PORT_PCR_MUX(4);//MII0_RXCLK
    PORTA_PCR25 = PORT_PCR_MUX(4);//MII0_TXCLK
    PORTA_PCR9  = PORT_PCR_MUX(4);//MII0_RXD3
    PORTA_PCR10 = PORT_PCR_MUX(4);//MII0_RXD2  
    PORTA_PCR28 = PORT_PCR_MUX(4);//MII0_TXER
    PORTA_PCR24 = PORT_PCR_MUX(4);//MII0_TXD2
    PORTA_PCR26 = PORT_PCR_MUX(4);//MII0_TXD3
    PORTA_PCR27 = PORT_PCR_MUX(4);//MII0_CRS
    PORTA_PCR29 = PORT_PCR_MUX(4);//MII0_COL
    #else
    PORTA_PCR14 = PORT_PCR_MUX(4);//RMII0_CRS_DV/MII0_RXDV
    //PORTA_PCR5  = PORT_PCR_MUX(4);//RMII0_RXER/MII0_RXER
    PORTA_PCR12 = PORT_PCR_MUX(4);//RMII0_RXD1/MII0_RXD1
    PORTA_PCR13 = PORT_PCR_MUX(4);//RMII0_RXD0/MII0_RXD0
    PORTA_PCR15 = PORT_PCR_MUX(4);//RMII0_TXEN/MII0_TXEN
    PORTA_PCR16 = PORT_PCR_MUX(4);//RMII0_TXD0/MII0_TXD0
    PORTA_PCR17 = PORT_PCR_MUX(4);//RMII0_TXD1/MII0_TXD1
    #endif 

 

But I don't know how to configure the registers.
The code provided in enet.c - void enet_init (ENET_CONFIG *config) - seems to be very basic and generic. I'd like to see some good driver for ENET module.

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