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How to configure the register to set up flow-to-core affinity in Qoriq P2040

Question asked by Wang Jie on Jun 14, 2017



I need to make the specific vlan id's packets flow to a specific CPU in Qoriq P2040 to keep this vlan id 's data flow in order.

So I need to configure the parse module and keyGen module in Fman in DPAA according to <QorIQ DPAA Primer for Software Architecture>.

But I failed to find a ducument to descripe the detal procedure to configure the registers like the description in <WBNR_FTF10_NET_F0681_PDF.pdf>. This document skip the PCD module when configure Fman.

Could you please help to tell me the detail procedure to implement the function?

Thanks for your support,


Best regards,