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Setup LPC824 in a multimaster situation

Question asked by Anders Zellén on Jun 15, 2017
Latest reply on Jun 20, 2017 by Carlos_Mendoza

I have two LPC824 and two other nrf51822 micro controllers charing the same I2C bus.

 

All need to be master at some point, on the LPC824 I am running hardware I2C, and on the nrf51822 I am running sw I2C, so the bus speed is really slow.

 

I have an issue when the two nrf51822 is communicating on the bus, the LPC824 is hijacking the bus in the middle of the communication, when the software want to take control of the bus.

Do I need to take any precautions before I put the LPC824 into master and issue the START condition.

I have set up the LPC824 like this

 

Chip_Clock_EnablePeiphClock(SYSCTL_CLOCK_I2C0);
Chip_SYSCTL_PeriphReset(RESET_I2C0);

LPC_I2C0->CFG = I2C_CFG_SLVEN;

LPC_I2C_SLVADR[0] = 0x80;

LPC_I2C_SLVADR[1] = 0x82;

LPC_I2C0->INTENSET = I2C_INTENSET_SLVPENDING | I2C_INTENSET_SLVDESEL;

NVIC_EnableIRQ(I2C0_IRQn);

 

When the micrcontroller need to transmit data, I have the following code

u8 setupMaster(u8 address) {

if((LPC_I2C0->STAT >> 8 ) & 0x40) {   //Check if the SLAVESEL bit is set

   return false;

}

SPI0_SEND_8bit(address);

SPI0_WAIT_FOR_FRAME();

SPI0_SEND_16bit_EOT(LPC_I2C0->STAT);

NVIC_DisableIRQ(I2C0_IRQn);

LPC_I2C0->CFG = I2C_CFG_MSTEN;

LPC_I2C0->CLKDIV = 100;

LPC_I2C0->MSTTIME = (3 << 4) | ( 3 << 0);

LPC_I2C0->INTENSET = I2C_INTENSET_MSTPENDING | I2C_INTENSET_MSTRARBLOSS;

LPC_I2C0->STAT = I2C_STAT_MSTSTSTPERR | I2C_STAT_MSTRARBLOSS | I2C_STAT_MSTPENDING | I2C_STAT_SLVDESEL  | I2C_STAT_MONOV | I2C_STAT_MONIDLE | I2C_STAT_EVENTTIMEOUT;

NVIC_ClearPendingIRQ(I2C0_IRQn);

LPC_I2C0->MSTDAT = address;

LPC_I2C0->MSTCTL = I2C_MSTCTL_MSTSTART;

 

NVIC_EnableIRQ(I2C0_IRQn);

return true;

}

 

When this is executed (I have some debug output on the SPI to know when it is happening, there is sometimes a distrubence in the I2C transmission that is ongoing, it could be that the CLK is hold down, that a start condition is issued and so on, so the question is.

When I use the LPC824 in an multimaster situation, how should I set it up to be sure that it leave ongoing I2C transmissions alone and wait until they are completed, is there any constrains about the I2C speed from the other masters to operate well?

 

/Anders Zellén

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