Question regarding initiate burst PCI Express transaction from Host CPU .(Using p1022).
As far as I understand CPU access to PCI memory will end-up in a 32bit or 64bit PCIE transfer requests.
Is it possible to create a read transaction of more then 64 bit (that will be implemented in one burst on the PCI Express)?
Is it possible to accomplish that with the DMA Controller where source address will point to a PCIE memory space?