AnsweredAssumed Answered

Configuration Parameter for QuadSPI Boot at i.MX7D

Question asked by Dieter Steininger on Jun 7, 2017
Latest reply on Jun 7, 2017 by igorpadykov

Reference Manual:

"The ROM expects the QuadSPI configuration parameters as explained in the QuadSPI
Configuration Parameters to be present in the Serial Flash memory from offset 0x400 of
serial flash of length 512 bytes."

 

MfgTool:

MfgTool writes qspi-header at addr 0x400 (MX6) or addr 0 (MX7D).

    <!--QSPI header-->
    <CMD state="Updater" type="push" body="send" file="qspi-header.sh.tar">Sending qspi header shell</CMD>
    <CMD state="Updater" type="push" body="$ tar xf $FILE "> Extracting...</CMD>
    <CMD state="Updater" type="push" body="send" file="files/%norconfig%">Sending QSPI header config file</CMD>
    <CMD state="Updater" type="push" body="$ sh qspi-header.sh $FILE"> Generating the ascii value header</CMD>
    <!--hexdump to convert ascii value to hex file-->
    <CMD state="Updater" type="push" body="$ busybox hexdump -R qspi-tmp > qspi-header">Converting ascii value to hex file</CMD>
    <CMD state="Updater" type="push" body="$ dd if=qspi-header of=/dev/mtd0 bs=1k seek=1" ifdev="MX6SX MX6UL">Writing header to NOR flash</CMD>
    <CMD state="Updater" type="push" body="$ dd if=qspi-header of=/dev/mtd0 bs=1k seek=0" ifdev="MX7D">Writing header to NOR flash</CMD>

 

We are running on SABRE Board, writing Configuration Parameter at addr 0 and u-boot.imx at 0x400 an everything seems to be fine.

 

My Question:

Is my configuration correkt (or is it just luck) or ist the reference manual incorrect in this point (Rev_0.1, 6.6.6.2).

Outcomes