We use GPIO00 as the MR function source of the reset IC, the Saber board has the same connection. We found that the GPIO00 level will be pulled low immediately when the reset is de-asserted. It will cause the reset IC to be asserted to low again and cycle to cycle. At that stage, the bootloader is not started yet and should be controlled by internal ROM.We see the Saber board use a 1uF to isolate the GPIO and MR input and we connect the GPIO to MR directly. It seems NXP has already found this issue? How to solve this issue if we connect to MR directly?