What means "Domain"

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What means "Domain"

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ko-hey
Senior Contributor II

Hi all

I want to know how to set the PLL_CTRL and CCGR register in i.MX7D.
I'm confuzing the setting because I can't understand the definition of Domain.

Q1.
There are a word "domain" in decription of SETTINGS field in CCM_PLL_CTRLn.
Does the word "domain" mean the CPU core number ?


Q2.
Which Core corresponds to each of Domains 0 to 3 is set by RDC_MDAn ?

Q3.
When I want to assaign A7 Core 0 and 1 to Domain0 and M4 assign to Domain1, do I set RDC_MDA0 to 0 and RDC_MDA1 to 1 ?

Q4.
I would like to do some processing independently from M4 from A7.
Do I assaign M4 to domain 1 when I use M4 only during A7 is Run or Wait?

Ko-hey

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igorpadykov
NXP Employee
NXP Employee

Hi Ko-hey

Domain if group of peripherals using some common resource, which could be
for example power or clock.

1. please refer to sect.5.2.6.7 Access control i.MX7D RM:
http://cache.nxp.com/files/32bit/doc/ref_manual/IMX7DRM.pdf

CCM can implement its own access control based on domain, to provide more precise
control on shared resource. Access controls are implemented on clock root generation,
clock gate control, and clock source control. Access control logic will never impact on
read access, but will block unauthentic write access.
Access controls on clock root generation are independent between every clock root. A
sticky authentic fail flag will be set if authentic check failed when a domain is trying to
write to some register.

>Which Core corresponds to each of Domains 0 to 3 is set by RDC_MDAn ?

please refer to Table 3-2. Master Assignment Mapping and description on
Figure 3-1. Dedicated and Shared Peripherals

For efficiency reasons the code on the cores may share chip resources such as peripherals
and memory. The sharing of chip resources between the somewhat independent
processing domains allows for the opportunity of data collisions where information
stored in peripherals or memory by a process on one core is overwritten by software
running on another core. Without careful collaboration between the two operating
systems inadvertent malfunction or degradation in performance may result.
The RDC provides a mechanism to allow boot time configuration code to establish
resource domains by assigning cores, bus masters, peripherals and memory regions
domain identifiers. Once configured, bus transactions are monitored to restrict accesses
initiated by cores and bus masters to their respective peripherals and memory.

>When I want to assaign A7 Core 0 and 1 to Domain0 and M4 assign to Domain1,
>do I set RDC_MDA0 to 0 and RDC_MDA1 to 1 ?

yes

>I would like to do some processing independently from M4 from A7.
>Do I assaign M4 to domain 1 when I use M4 only during A7 is Run or Wait?

when M4 is assigned to domain 1, it does not matter A7 is Run or Wait. Please refer to
description in sect.3.2.2.4 Resource Domain Control and Security Considerations

Conceptually, the RDC configuration is independent of the processor privilege mode and
security domain. It is intended to allow for isolation between core processing
environments to prevent collisions and increase reliability. Access between resource
domains is mutually exclusive and each domain should be in control of its own privilege
modes and access rights.

Best regards
igor
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