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Sgtl5000 audio codec Mclock Problem

Question asked by arungopal kondaveeti on Jun 2, 2017
Latest reply on Jun 7, 2017 by arungopal kondaveeti



Currently iam working on SGTL5000 Codec Interfacing to imx6 sololite Processor.I got /dev/dsp node and in cat /proc/sound/devices it is showing sgtl5000 Codec Information.In mclock pin it is unable to generate the clock from SOC Pins.Please clarify my doubts.




audmux: audmux@021d8000 {
                                        compatible = "fsl,imx6sl-audmux", "fsl,imx31-audmux";
                                        reg = <0x021d8000 0x4000>;
                                        status = "disabled";


                                i2c2: i2c@021a4000 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                        compatible = "fsl,imx6sl-i2c", "fsl,imx21-i2c";
                                        reg = <0x021a4000 0x4000>;
                                        interrupts = <0 37 0x04>;
                                        clocks = <&clks IMX6SL_CLK_I2C2>;
                                        status = "disabled";




 i2c2 {
                        pinctrl_i2c2_1: i2c2grp-1 {
                                fsl,pins = <
                                        MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1
                                        MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1


audmux {
                        pinctrl_audmux_1: audmux-1 {
                                fsl,pins = <
                                        MX6SL_PAD_AUD_RXD__AUD3_RXD       0x0130b0     /*0x4130B0*/
                                        MX6SL_PAD_AUD_TXC__AUD3_TXC       0x0130b0     /*0x4130B0*/
                                        MX6SL_PAD_AUD_TXD__AUD3_TXD       0x0130b0     /*0x4110B0*/
                                        MX6SL_PAD_AUD_TXFS__AUD3_TXFS     0x0130b0     /*0x4130B0*/
                                        MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x0130b0     /*0x4130B0*/











sound {
        compatible = "fsl,imx-audio-sgtl5000";
        model ="sgtl5000";

        cpu-dai = <&ssi1>;
        CPU DAI Replaced with ssi-controller

        ssi-controller = <&ssi1>;
        audio-codec = <&sgtl5000>;
        audio-routing =

        "MIC_IN", "Mic Jack",
        "Mic Jack", "Mic Bias",
        "Headphone Jack", "HP_OUT";

         mux-int-port = <2>;
         mux-ext-port = <3>;
        hp-det-gpios = <&gpio2 0 0>;                                      
        hp-det-debounce = <250>;     




&audmux {

        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_audmux_1>;
        status = "okay";


clock-frequency = <100000>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2c2_1>;
        status = "okay";
        /*DT Binding for CODEC DAI DRIVER

         sgtl5000:codec@0a {
        compatible = "fsl,sgtl5000";
        reg = <0x0a>;




iam able to probe both the codec and IMX SOC Driver successfully but the IT is showing like this

Device with ID register ffff is not a sgtl5000

1)Why is showing like this.

2)when iam connect to oscilloscope to Audio M Clock it is not showing the clocks from soc.

3)when iam connect to oscilloscope to i2c clock  it is not showing the clocks from soc.

Please clarify my doubts.why it is not generating the clocks and why it is showing the Device id register is not a sgtl.


Please clarify my doubts.