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iMX6DL - Invert LDB clock polarity

Question asked by Pierre Le Gargasson on Jun 1, 2017
Latest reply on Jun 1, 2017 by igorpadykov


I'm using iMX6DL with Android 5.1.1, Linux kernel 3.14.52. I use LVDS output for display signals. These signals are converted to RGB by an external IC because I use RGB display (only LVDS signals are available from iMX6 hardware).


I'm looking to invert clock polarity of the RGB display. So I tried to invert LVDS clock polarity, which fail until now.
The display is printing the half of screen and blinking pixels. I can see if I stop/enable the good clock source. By default, PLL5 is the clock source.


Ref manual Rev. 2, 04/2015.
- With regaccess, I tried to change some registers, including IPU_DI0_GENERAL, bit 17, di0_polarity_disp_clk => do nothing.
- p810, IPU1_DI0_CLK_ROOT source could be PLLs, ipp_di0_clk, ldb_di0_ipu => when I switch to ldb_di0_ipu (register CHSCCDR:ipu1_di0_clk_sel), screen freezes. What is the source of ldb_di0_ipu ? Which register should I change to invert this clock source ?


Any advice will help.
Thanks, Pierre