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[MPC5777C] FCCU Isr is occured by STCU2

Question asked by JONGMIN NA on May 31, 2017
Latest reply on Jun 5, 2017 by JONGMIN NA

Dear NXP engineers,

 

I just want to make sure this symptom is normal or abnormal thing.

MCU : NXP MPC5777C 3N45H

Compiler : WindRiver DIab 5.9.4.0

Operating system clock : 264Mhz

OS : ETAS RTAOS

 

I tested with on-line tset code(MPC5777C_on-line_bist_3N45H.c) at AN5288 "MPC5777C STCU Quick Start Guide"

 

This is test sequence

1. Core 1 is halted and reset.

2. Core 0 is running only

3. Execute run_online_bists()

4. FCCU Isr is invoked

I have been set to FCCU register, especially, 10th RCCU_0, 23rd PLL_0 are set.

5. FCCU detect RCCU_0, PLL_0 fault during on-line bist.

like below, Captured from T32 PowerView

 

I think FCCU check Core 0 and Core1, RCCU. So FCCU could detect fault even though It is not real fault.

Also I could see our system come back to normal operating mode after on-line bist is completed. Of course there is running reset due to STCU.

Do you think so? Or I should change configuration?

Please give me your feedback.

 

 

Best regards,

JM

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