I have a strange problem. T4240 e6500 loads wrong data using following code:
ld r9, 376(r31)
I am stepping the code segment in CW as many times and the problem stays there.
First line loads address pointing to DDR or CPC3 SRAM (issue was seen with both). So far so good, r9 gets correct value.
lbz as the next one loads 0x00 instead of 0x01.
In CW using Memory view I can se 0x01 at the location. I can repeat as several times and lbz will always read 0x00.
Dcache is disabled over that area and CW does not show this address to be present in Dcache.
If I modify the value in Memory window of CW, e6500 will then read correct value (modified) one.
The value was written to this location by another e6500. The region is uncached also on that one.
Any ideas in what circumstances this could happen?