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Question, i.MX6SoloX / ERR009572

Question asked by Masamichi Miyamoto on May 21, 2017
Latest reply on May 22, 2017 by Masamichi Miyamoto

Dear team,

 

I would like to ask about ERR009572 of i.MX6SoloX.

My customer has been facing the issue that accessing to RDC registers from Cortex-M4 fails. They thought that this issue might be caused by ERR009572, and they read eFuse (PCIe_DISABLE) value from the chip. As a result, the value indicated that PCIe=disabled even though the chip’s datecode=1525. They are using the chips which have the date code of 1525.

In your errata document(IMX6SXCE, Rev.1), it is said that the silicon devices that have date code 1524 or later are un-fused. And it does not match with the description of ERR009572.

Could you double-check whether the chips which have the date code 1524 or later realy are un-fused(PCIe=enabled)?

Maybe they will use the chips which have date code 1524 or later for their mass-production, but we need to show them the evidence which indicates the chips’s eFuse is realy un-fused. The customer has a doubt on the description of the errata document.

 

Thanks,

Miyamoto

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