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When no SPL during booting , DDR init happens in SRAM or Flash(NOR)

Question asked by Aditya Nagal on May 22, 2017
Latest reply on May 22, 2017 by igorpadykov

Hi ,

 

I am working on the IMX6 solo based design. In which there is no SPL used in booting process. My u-boot is in the NOR Flash. Now when the booting starts , instruction for DDR initialization get executes in SRAM  or it get executed on the NOR flash directly . I had discussion over this in two separate threads  but found different views on it . One has suggested that starting instructions get executed on the flash itself . Another suggested that , starting instructions get copied to SRAM  and then relocation happens . Please suggest.

 

https://community.nxp.com/thread/451730

https://community.nxp.com/thread/448636

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