I am working on the IMX6 solo based design. In which there is no SPL used in booting process. My u-boot is in the NOR Flash. Now when the booting starts , instruction for DDR initialization get executes in SRAM or it get executed on the NOR flash directly . I had discussion over this in two separate threads but found different views on it . One has suggested that starting instructions get executed on the flash itself . Another suggested that , starting instructions get copied to SRAM and then relocation happens . Please suggest.