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What are USB1/2/3_DRVVBUS rule?

Question asked by 小斌 王 on May 19, 2017
Latest reply on May 27, 2017 by 小斌 王

We design our product refer to the LS1043ARDB. On the basis of MiniPCIE circuit diagramand, if  using  the USB3 as host mode, we must add circuit  to tie the USB3_ID to GND.  As I know, the USB3_VBUS and USB2_VBUS  share power USB2_P2_PWR which is controlled by USB2_DRVVBUS Pin.

Could you please explain what are USB1/2/3_DRVVBUS rule?

The USB3_DRVVBUS Pin is used for TDMA_RQ in the LS1043ARDB, we use USB3 as host mode, deos USB3_DRVVBUS need? We want to use USB2 and USB3 independently.


The USB2_DRVVBUS is a multi-functional pin( 000 IIC3_SCL, 001 GPIO_4[10], 010 EVT_B[5], 011 USB2_DRVVBUS,100 BRGO4,101 FTM8_CH0,110 CLK11), the default value is 0x0 on HRESET,It is means that the default function is IIC3_SCL. In the SDK code, I can not find where does configure this pin function? Could you please help me? If, I will be very grateful.


Looking forward to your reply.

Have a great day.