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mpc8270 SCC2 UART issue:  BRGC sometimes  locked incorrect baud rates for autobaud

Question asked by Gang Luo on May 18, 2017
Latest reply on May 21, 2017 by Pavel Chubakov

I am using mpc8270 SCC2 UART auto baud feature.

It am facing a mpc8270 SCC2 UART issue  that BRGC sometimes  locked incorrect baud rates for autobaud. 

This issue is very similar to an issue that I reported for MPC8360E (https://community.nxp.com/message/902477)

 

 

 It was found in the following two group of test cases that

  • a specific set of characters seems to always  trigger correct BRGC baud rate locking (Test Case Group 1), and
  • an another specific set of characters (Test Case Group 2) always  trigger incorrect BRGC baud rate locking.   In these cases, the un-existing BRKs from DCE were always reported by SCC2 SCCE register.


Our connection configuration is as below:

 setup:   DCE has fixed baud rate: 19200.   8270 SCC2 DTE sets as autobaud  

  [ MCP8270 SCC2 DTE (autobaud) ]  <------------->    [DCE (fixed baud rate 19200)]

 

Processor Version Register (PVR) = 0x80822014 (mpc8270/8280)

-------Test Case Group 1:   
(correct baud locking cases)
   DCE(19200)  send Rx single "5"
   SCC2 saw 2 Rx: 0x1c 0xf3     locked_brgc=0x100f0 (
locked_baud:19369)   locked baud close to 19200/ok_translate!
         note: there was no any errors reported by SCC2's SCCE event register even though received two
               Rx bytes 0x1c 0xf3 do not match to "5" (0x35) from DCE.
   DCE(19200)  send Rx  "55555555" or anything
   SCC2 saw   "55555555" or anything
     note from testing:
          characters ( 2, 3, 4 5, 6, 7, T, U, V, l, m, n, o, s, t, u, w) can triggered corrected BRGC locked baud.
 
-------Test Case Group 2:  
(incorrect baud locking cases),
step1:  DCE(19200)  send Rx single "A"     
step2:  SCC2 saw 1 Rx: 0x1c       
            scce=0x101[AB:0,IDL:1,GRA:0,BRKE:0,BRKS:0,CCR:0,BSY:0,TX:0,RX:1]
      with one error (FR:1) reported by BD status as below
      rxbd       Stat   Len    DataPtr    Data
     0xf0000c20 0x3010 0x0001 0xf0000c7f 0x1c [E:0 W:1 I:1 C:0 A:0 CM:0 ID:0 AM:0 BR:0 FR:1 PR:0 OV:0 CD:0] ERROR
        SCC2 saw 1 AB event     locked_brgc=0x10320 (
locked_baud:5844)     locked baud is far away from 19200
           scce=0x300[AB:1,IDL:1,GRA:0,BRKE:0,BRKS:0,CCR:0,BSY:0,TX:0,RX:0]  
step3:  DCE(19200)  send Rx single "A" again
step4:    SCC2 saw 1 Rx: 0xFE         without any error by BD status  
        scce=0x101[AB:0,IDL:1,GRA:0,BRKE:0,BRKS:0,CCR:0,BSY:0,TX:0,RX:1]
          rxbd       Stat   Len    DataPtr    Data
       0xf0000c20 0x3000 0x0001 0xf0000c7f 0xfe [E:0 W:1 I:1 C:0 A:0 CM:0 ID:0 AM:0 BR:0 FR:0 PR:0 OV:0 CD:0]
step5:   DCE(19200)  send Rx  "AAAAAAA"
step6:   SCC2 saw 1 Rx: 0xFE 0xFE 0xFE 0xFE 0xFE 0xFE 0xFE        without any error by BD status  

     note from testing:
         characters ( 0,1,8,9, all letters except for "T, U, V, l, m, n, o, s, t, u, w")
                triggered incorrected BRGC locked baud.
 

========= Comments & Observation 
It looks that when SCC2 incorrectly  declared the reception of BRKs that were not sent by DCE at all, BRGC locked incorrect baud rate.

========= procedure of  Trigger MPC8270 SCC2 UART autobaud  =======

1. BRGC  programing:  program the new value (e.g. 9600)
    Result:  operation baud rate (OPER_BAUD) =9605,  brgc=0x101e6 [RST:0,EN:1,ATB:0,CD:0xf3]
2. Set SCCM[Rx] and SCCM[AB] and so on
3. Waiting for Rx Receive data  (i.e. waiting for SCCE[Rx]  set) for setting ATB bit at BRGC register
    (note: 8280RM rev.1 page 17-3:  ATB must remain zero until the SCC receives the three Rx clocks.)
4.  Set EN & ATB bits  at BRGC register for triggering MPC8360 BRGC autobaud
     mechanism that sets BRGCx[CD] and BRGCx[DIV16]
5.  Waiting for AB event
    when receiving  AB event, read locked  BRGCx[CD][DIV16] for locked baud rate
    At this point, BRGC is expected to lock up the incoming baud rate by  setting BRGCx[CD] and BRGCx[DIV16].
    software will read BRGCx[CD] and BRGCx[DIV16], and re-setting them to one of closest standards baud rates (i.e, 9600, 19200, ..., 115200)

    adjust the  BRGC to the closet standard baud rate, clear ATB bit in brgc.
6. can receive the DCE Rx inputs.  


The following is the setting before executing the above procedure:
IMM SCC2 data
gsmr_l 0xf0011a20 0x00228034    gsmr_h 0xf0011a24 0x00000062
psmr   0xf0011a28 0xb000        todr   0xf0011a2c 0x8000
dsr    0xf0011a2e 0x7e7e        scce   0xf0011a30 0x0100
sccm   0xf0011a34 0x0047        sccs   0xf0011a37 0x03

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