IMX6SX EHCI Host Controller question:
We are using Micrium uC/III Synopsis-style EHCI HCD for host controllers with TT on the USB host port. We want to do a read that could be long or short. when we ask for a ~64K BULK-IN from the driver, it sets up it's endpoint QH with 4 QTDs in a chain and alt-next set to 0x00000001. A short read occurs and an interrupt is generated. at this time the QH->Token->Active bit is set, and the first QTD->Token->Active bit is not set, and the other three QTD->Token->Active bits are not set.
Why is the QH->Active bit still set when the a short packet occurs and the alternate next pointer is set as invalid?
What is the proper sequence to avoid or workaround this occurance?