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256Mx16 4Gb DDR3 SDRAM one bank?

Question asked by Herman Zeilstra on May 8, 2017
Latest reply on May 9, 2017 by igorpadykov



Stupid question, can I make an I.MX7 work with one bank of 256Mx16 4Gb DDR3 SDRAM or do I need two banks to connect all data pins on the chip?





Data Strobe: output with read data, input with write data. Edge-aligned with read data, centered in write data. For the x16, DQSL corresponds to the data on DQL0-DQL7; DQSU corresponds to the data on DQU0-DQU7. The data strobes DQS, DQSL, and DQSU are paired with differential signals DQS#, DQSL#, and DQSU#, respectively, to provide differential pair signaling to the system during reads and writes. DDR3 SDRAM supports differential data strobe only and does not support single-ended.


Can I connect DQL0-DQL7 to ADDR0-7 and DQU0-DQU7 to to ADDR8-15 ? 

And then conect the differential signals of the datastrobes DQS, DQSL, and DQSU & DQS#, DQSL#, and DQSU#