Jean Bony

How to Enable JN516x SPI master mode :JN-SW-4170/4168?

Discussion created by Jean Bony on Apr 26, 2017
Latest reply on Apr 27, 2017 by Jean Bony

I'm using the JN5169 with the JN-SW-4170, I want to use the SPI port on the JN516x in master mode to interface to a slave device (via CS SPISEL1 : DIO0).

But my SPI read access are returning always 0xffff because the JN516x SPI master is not generating any clock on its SPI clock pin (DO0), although the SPISEL1 line (DIO0) is activating/deactivating accordingly.

 

I keep getting the following error:  

----------------------------------------------------

!!! Bus error

Unclaimed Interrupt at priority 8
u32PICMR = 0 : u32PICSR = 8008
u32PICMSR = 0 : u32IPMR = 0
u32IHPR = 8 : u32AINT = 8008 u32PINT 0
EPCR = 94685 : EEAR = 4014
Stack dump:
4007d14 : 00000003
4007d18 : 000963f8
4007d1c : 04002890
4007d20 : 00094685

.............

-------------------------------------------------------------

Below are my SPI: init, read and write functions

 

#include "AppHardwareApi.h"

#include "PeripheralRegs.h"  /*Not necessary  - tried with and without*/

 

# define CS_DEV = 1;

#define CS_ENABLE_MASK  (1 << CS_DEV)  /*active the appropriate bit for CS line DIO0*/

#define NXP_JN516X_PERIPHERAL_CLOCK 16000000 /*That's the peripheral clock supported by the JN516x*/

#define SPI_SPEED 1000000 /*Desired SPI speed = 1MHz*/

#define SPI_CLOCK_DIVIDER (NXP_JN516X_PERIPHERAL_CLOCK/SPI_SPEED)

 

Peripherals API enabled within my app_start.c as per below:

u32AHI_Init();

 

int spi_init(void)

{

 

          vAHI_SpiConfigure(CS_DEV, FALSE, FALSE, FALSE, SPI_CLOCK_DIVIDER, FALSE, FALSE);

      /* uint8 u8SlaveEnable
         * bool_t bLsbFirst,
         * bool_t bPolarity,
         * bool_t bPhase,
         * uint8 u8ClockDivider,
         * bool_t bInterruptEnable,
         * bool_t bAutoSlaveSelect

      */

         vAHI_SpiSelSetLocation(E_AHI_SPISEL_1, FALSE);  /*FALSE: use DIO0 for SS_SEL1*/

         return 0;

}

 

Below are my SPI read and write

 

/*Sub-routine to write 1 or up to 256 8-bits words to the SPI bus*/
int nxpSpiMwordsWrite(uint8_t numbytes, uint8_t *pData)
{
      int i =0;

      vAHI_SpiSelect(CS_ENABLE_MASK );  /*drive the selected Chip select specified by addr LOW*/
      if (bAHI_SpiPollBusy())
      {
            DBG_PRINT(VPROC_DBG_LVL_ERR,"SPI master is busy\n");
            return -1;
      }
      for (i=0; i<numbytes; i++)

      {
            vAHI_SpiStartTransfer(7, *(pData+i));  /*writing 1 byte (8-bit) at a time*/
            vAHI_SpiWaitBusy();
            DBG_PRINT(VPROC_DBG_LVL_FUNC,"WR: *(pData+%d) = 0x%2x\n", i, *(pData+i));

      }

      vAHI_SpiSelect(0 );  /* CS HIGH*/
      return 0;
}

/*Sub-routine to read 1 or up to 256 8-bits words from the SPI bus*/
int nxpSpiMwordsRead(uint8 numbytes, uint8_t *pData)
{
      uint8 i =0;

      vAHI_SpiSelect(CS_ENABLE_MASK  );  /*drive the selected Chip select specified by addr LOW*/
      if (bAHI_SpiPollBusy())
      {
            DBG_PRINT(DBG_LVL_ERR,"SPI master is busy\n");
            return -1;
      }
      for (i=0; i<numbytes; i++)

      {
            *(pData+i) = u8AHI_SpiReadTransfer8();
            vAHI_SpiWaitBusy();
            DBG_PRINT(DBG_LVL_FUNC,"RD: *(pData+%d) = 0x%2x\n", i, *(pData+i));
      }

      vAHI_SpiSelect(0 );  /* CS HIGH*/
      return 0;
}

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