i.MX6 with RMII and clock externally sourced from RGMII_TX_CTL

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i.MX6 with RMII and clock externally sourced from RGMII_TX_CTL

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ilariogottardel
Contributor II

Good morning,

in our design (based on the SABRESD) we choose to connect and i.MX6 Quad to ethernet in RMII mode, sourcing clock from the PHY. I've connected this external clock signal to pad RGMII_TX_CTL (C23).

We started from the SABRESD device tree, modifing the "fsl,pins" section. And it kinda worked, but the clock signal was very distorted and ifconfig told me there were lots of framing errors.

We then realised that there were two clocks running! One from the PHY and one from i.MX6. So, we tried to remove "IMX6QDL_CLK_ENET_REF" from the "clocks" section of fec, and that made only the external clock present.

Now there are no framing errors, and ping works correctly, but it's not possible to do anything besides this. It doesn't resolve names, it doesn't connect to services. With two clocks it did those things, even if badly. With one, it doesn't.

So, what should we put on the "clocks" section to have fec using external clock and i.MX6 not generating one?

Thank you very much

Have a nice day

Ilario

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igorpadykov
NXP Employee
NXP Employee

Hi IIario

seems one can look at register IOMUXC_GPR1[ENET_CLK_SEL] settings,

it is configured in mach-imx6q.c init imx6q_1588_init(). Corresponding

dts setting in ..lookup_by_compatible("fsl,imx6q-iomuxc-gpr")

linux-imx.git - i.MX Linux Kernel 

Best regards
igor

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igorpadykov
NXP Employee
NXP Employee

Hi IIario

please check similar issue on

https://community.nxp.com/thread/358798

Best regards
igor
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ilariogottardel
Contributor II

Hellp Igor,

unfortunately that question is not very related to mine.. electrically our connections are right, I need to configure the device tree accordingly. This are our fec sections:

From imx6qdl.dtsi (comments are mine, to stop i.MX6 to generate a clock):

fec: ethernet@02188000 {
                compatible = "fsl,imx6q-fec";
                reg = <0x02188000 0x4000>;
                interrupts-extended =
                    <&gpc 0 118 IRQ_TYPE_LEVEL_HIGH>,
                    <&gpc 0 119 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&clks IMX6QDL_CLK_ENET>,
                     <&clks IMX6QDL_CLK_ENET>; /*,
                     <&clks IMX6QDL_CLK_ENET_REF>;*/
                clock-names = "ipg", "ahb"; /*, "ptp";*/
                stop-mode = <&gpr 0x34 27>;
                fsl,wakeup_irq = <0>;
                status = "disabled";
            };

From imx6qdl-sabresd.dtsi:

&fec {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_enet>;
    phy-mode = "rmii";
    phy-reset-gpios = <&gpio7 0 0>;
    fsl,magic-packet;
    status = "okay";
};

pinctrl_enet: enetgrp {
            fsl,pins = <
                MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN    0x1B0A0
                MX6QDL_PAD_ENET_MDC__ENET_MDC        0x1B0A0
                MX6QDL_PAD_ENET_MDIO__ENET_MDIO        0x1B0A0
                MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0    0x1B0A0
                MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1    0x1B0A0
                MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER    0x1B0A0
                MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0    0x1B0A0
                MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1    0x1B0A0
                MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN    0x1B0A0
                MX6QDL_PAD_RGMII_TX_CTL__ENET_REF_CLK    0x10020
            >;
        };

I think we need to correct the "clocks" section to tell the fec from where the clock should be sourced. But I can't find how to do it... if I leave that section unmodified, i.MX6 generates a clock, but that is not good because there is already a clock on that net. Bad things happens.. but it works (it can ping, it can resolve names, it can make connections). If I comment away the third clock, only the one generated by PHY remains, but only ping works: it can't resolve names, it can't connect to anything. Only changing that single line on the device tree!!!

Any ideas?

Have a nice day

Ilario

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igorpadykov
NXP Employee
NXP Employee

Hi IIario

seems one can look at register IOMUXC_GPR1[ENET_CLK_SEL] settings,

it is configured in mach-imx6q.c init imx6q_1588_init(). Corresponding

dts setting in ..lookup_by_compatible("fsl,imx6q-iomuxc-gpr")

linux-imx.git - i.MX Linux Kernel 

Best regards
igor

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