AnsweredAssumed Answered

PCB layout i.MX7D w/ DDR3

Question asked by Tomohisa Sakamoto on Apr 18, 2017
Latest reply on Apr 21, 2017 by Yuri Muhin

Hi Support-team,


We have some questions below.

Please support us asap.


See <IMX7DSHDG.pdf>Rev. 0    P19


Regarding Length for CLK

1.Group:Address and Command       

       1-1.Length Min Clock (min) – 200            => 200mils? ,Is the range within?

       1-2.Length Max Clock(max) Clock (min)1 =>  What is the meaning of "1"?


2.Group:Byte Group 1

      2-1.DQS strobe should have maximum length of Clock -10 mils

       => Is it OK in the judgment of "within" the range of 10 mils?


      2-2.Limit minimum DQS length (lesser of): Clock (min) – 10 mils or 1000mils

       => For example, When CLK = 1500 mils,DQS: 1490 mils or 1000 mils

           Which one should we choose?

           If DQS=1000 mils, there is no relation between DQS and the wiring length of CLK.
           For 1490 mils, we can not understand meaning of above comments.