We tested memory timing DDR validation tool.
We heard we can use fixed value for RD_DL_SET=4 and GATE_CFG=0 regardless of the result of DDR validation results.
However, the result of RD_DL_SET shows good values are 4,5,6,7. It should use 5 or 6 for RD_DL_SET. Do you recommend still use 4 regardress this results?