LPC1313 baud rate of 921600

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LPC1313 baud rate of 921600

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prachipanse
Contributor III

Hi,

I am using LPCOpen with LPC1313 device. I need to set the baudrate to 921600. However, I am able to set the baud rates to 900000 or 1125000 even after enabling the fractional divider.

Please let me know if it is possible to set the baud rate more accurately and what I may be doing wrong.

Regards,

Prachi

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Prachi Panse,

   From the UART baud rate calculate formula:

pastedImage_1.png

1. 1 <=MULVAL  <= 15
2. 0 <= DIVADDVAL <=14
3. DIVADDVAL< MULVAL

We can get all the factors which may relate to the UART baud rate.

Normally, the baud rate allowed error is +-1.5%, the lpc1313 defined should less than 1.1%.

So, you need to follow this flow to calculate the according data:

pastedImage_2.png

If in the fixed PCLK, all the other parameter can't meet your demand, you need to consider to choose the other PCLK(clock), then calculate it again.

Wish it helps you!


Have a great day,
Kerry

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prachipanse
Contributor III

Hi,

I am directly using the APIs available in the LPCOpen library for LPC1313 for the calculation and setting of baud rate. With that I am able to set only either 900000 or 1125000. I have tried using multiple values of the clock divider for the UART peripheral. The system clock is 72MHz. Is it possible to set the UART rate accurately to 921600?

Thanks and Regards,

Prachi

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prachipanse
Contributor III

Hi,

Could you please confirm that is not possible to set the UART bit rate to 921600 for LPC1313, but that we can set only 900000 or 1125000 bps?

Thanks.

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kerryzhou
NXP TechSupport
NXP TechSupport

Hello prachi panse,

    Really so sorry for my later reply, because of overloaded before.

   Yes, LPC1313 can set the UART bit rate to 921600, but not the same, actually it is 923076, but it doesn't matter, the relative error is just 0.16%, it is smaller than 1.5%, so you can use 921600 bps directly.

   Now, tell you the details about the calculation.

Take your system clock 72Mhz directly as the uart pclk, just follow the algorithm for setting USART dividers which I give you before.

1. Dlest= 72Mhz/(16*921600)=4.88.

   It is not the integer number, so the next step is to estimate the FR parameter.

2. Using an initial estimate of FRest=1.5.

  Dlest_new=72Mhz/(16*921600*1.5)=3.2, take the integer data 3 as the DLest data.

  FRest=72Mhz/(16*921600*3)=1.627, it is in the range of 1.1 and 1.9.

Checking the table, choose the closest value for FRest=1.628, it is .625.

pastedImage_1.png

so, at last, the DIVADDVAL=5, MULVAL=8, DLM=0, DLL=3.

Now, use these value, to calculate the real baudrate it will get:

baudrate=72Mhz/(16*(256*0+3)*(1+5/8))=923076 bps.

The relative error is (923076 -921600)*100%/921600 = 0.16%, it is smaller than 1.5%.

So, you can get 921600 with the data which I calculated.

Wish it helps you!

Any updated question, just let me know!


Have a great day,
Kerry

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