I have a custom target based on P1022DS demo board. There is a SGMII PHY(Clause 22 supported) connected the processor. On trying to access the PHY registers from u-boot using mii read/write , it gives all Fs. The MAC configuration,PMUXCR and PMUXCR2 is verified and it seems OK. On using debugger after issuing a mii read command from u-boot, it could be seen in the debugger that the PHY addr(0x8) and register addr are reflected in eTSEC1 MII Management registers. However the value updated in MIIMSTAT is always 0xFFFF.
Though the internal TBI PHY (addr 0x1F) is correctly accessed from u-boot. The TBI ANA setting for the TBI PHY is also updated as per AN3869 which is 0x4001.
Please suggest what else to look into for debugging it.