I am working on IMX6 solo based target board. Considering NOR flash is interfaced with IMX6 solo ,
when the CPU boots up , it checks for the IVT (Image Vector Table) in the NOR Flash , calculate the offset as per the NOR Flash , add it to the base address and then jump to the DCD table( Device Configuration data ) , read the configuration registers and initialize the peripheral .
My questions are :
1) once the DRAM is initialsed by the ROM , does the u-boot copies/loads itself to the DRAM or the ROM copies/loads the u-boot to the DRAM ?
2) Do the some instructions get executed directly from the NOR flash prior relocating the u-boot to the DRAM ?