P2020 PHY control problem

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P2020 PHY control problem

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byeongseongjang
Contributor II

P2020 PHY control problem ..

Hello?

P2020 related questions.

Related to TSEC2 Ethernet PHY chip control
MDC, MDIO port measurement result
PHY chip control waveform on P2020 (measured by oscilloscope): Normal
Response waveform on PHY chip: Normal
However, output using MII utility commands:
The chip ID value is read as 0000
Even if PHY chip is removed, chip ID value is read as 0000
(Note: TSEC3 Ethernet PHY chip is normally accessed)

TSEC2, 3 use the same PHY chip

I'm curious about the solution.
 
Thank you.

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5 Replies

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ufedor
NXP Employee
NXP Employee

Please check value of the eTSEC1 TBI PHY address register (ETSEC1_TBIPA).

Note that MII Management hardware of the eTSEC1 is used to access not only external PHYs,  but also internal TBI PHY of the eTSEC1. This is why the TBIPA value must not be equal to any external PHY ID (or you will read internal TBI registers instead of external PHY ones).

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byeongseongjang
Contributor II

Thank you for the reply.

TSEC1 is not used.
The result of checking TBIPA register value is as follows

TSEC1 TBIPA = 0x00
TSEC2 TBIPA = 0x1F
TSEC3 TBIPA = 0x1F

Is it possible to happen because the values of TSEC2 and TSEC3 are the same?

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ufedor
NXP Employee
NXP Employee

What are external PHYs addresses?

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byeongseongjang
Contributor II

External PHYs address

TSEC2 = 00

TSEC3 = 01

 TSEC2 PHYs address and TSEC1 TBIPA setting value are the same

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ufedor
NXP Employee
NXP Employee

> TSEC2 = 00

Please attentively read my first response and change the eTSEC1 TBIPA to be not equal to 0 and 1.

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