Here is the very simple experiment I perform to cause the processor to latch up or float PTA5:
Software is basically doing this (just to give an idea):
SOPT1 = 0x00 //Cop off, disable BDM
ICSC1 = 0; //Clock setup
ICSC2 = 0;
PTA0 = input
PTA1 = input
PTA2 = input
PTA4 = output
PTA5 = input
Now, for hardware, I just have a 100K pull down on PTA5. PTA5 is 0V on power up as expected. If I then pull PTA5 to 3.3V, it stays floating around 2V once I release the 3.3V. I can get it to go back to 0V by shorting it, or using a low value pull down resistor. If I do this on say PTA1, the input goes back to 0V as expected.
I have found this to be the only hint in the data sheet that this pin requires something 'special', from page 18:
"6 - PTA5 does not contain a clamp diode to VDD and should not be driven above VDD. The voltage measured on this pin when
internal pullup is enabled may be as low as VDD – 0.7 V. The internal gates connected to this pin are pulled to VDD."
I also have a more complex experiment which causes this same float state when powered up with PTA2 pulled to 5V via a 470K resistor, but, only PTA2, non of the other inputs cause this to happen.
Thanks in advance.
Edit: using Code warrior 5.0.9, and the processor is a S08QD2 8 pin SOIC running 3.3V
Message Edited by CarlFST60L_3rd on 2008-07-30 05:26 AM
Message Edited by CarlFST60L_3rd on 2008-07-30 05:27 AM
Message Edited by CarlFST60L_3rd on 2008-07-30 05:31 AM
Message Edited by CarlFST60L_3rd on 2008-07-30 05:40 AM
Message Edited by CarlFST60L_3rd on 2008-07-30 05:51 AM