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DDR Stress Test (t0.1: data is addr test) Failed

Question asked by Masatsugu Yamada on Mar 24, 2017
Latest reply on Apr 5, 2017 by Masatsugu Yamada

We are using i.MX6 (MCIMX6Q7CVT08AC) on custom board, and the i.MX6 accesses to micron DDR3 DRAM (mt41k256m16ha).

We tried DDR Stress Test v1.0.3 on this environment,


DDR Stress Test (1.0.3) for MX6DQ
Build: Sep 18 2014, 11:11:44
Freescale Semiconductor, Inc.


the test was failed at "t0.1: data is addr test".

loop: 543
DDR Freq: 528 MHz
t0.1: data is addr test
Address of failure: 0x103f07b0
Data was: 0x003f07b0
But pattern should match address

All boards we have produced were failed at the same test item in 2~3 days (loop 450~650). Also all fail was caused by same symptom, some bit "1" was flipped to "0". So we have tried latest Stress test,


but it was not failed for over 4 days.

My question is, why there is a difference between new test and old test, especially from test algorithm point of view.
We are currently concerned about Row Hammer possibility, after this Stress Test. If there is vulnerability in our system, we'd like to resolve the problem.


Thanks in advance,