Hi Hanson,
Low power mode or Freeze mode request is not acknowledged if there is any activity on the bus (RX/TX operation). When Freeze Mode or Low power mode is requested during transmission or reception, FlexCAN does the following:
- Waits to be in either Intermission, Passive Error, Bus Off or Idle state
- Waits for all internal activities like arbitration, matching, move-in and move-out to finish
Note:permanent dominant failure on the bus may prevent to enter device into low power mode or Freeze mode. The permanent dominant condition is usually associated with a fail in the bus, so with low probability. But in some devices, such as MPC56xxB, the natural state of the Rx CAN pin, if disabled, is zero. This pin state leads to the permanent dominant issue and thus preventing the module to enter freeze or low power modes.
Entering Low power / Freeze mode is signalized by setting NOT_RDY/FRZ_ACK flags in FlexCAN MCR register.
If flags are not set and you get a lock condition in while loop, a timeout can be used to leave the while loop. Finally soft reset action should be done to remove this lock condition.
The following procedures can be used:
1. Set both the Freeze Enable bit (FRZ) and the Halt bit (HALT) in the Module Control Register (MCR).
2. Check if the Module Disable bit (MDIS) in MCR register is set. If yes, clear the MDIS bit.
3. Poll the MCR register until the Freeze Mode Acknowledge bit (FRZ_ACK) in MCR is set or the timeout is reached (see NOTE below).
4. If the Freeze Mode Acknowledge bit (FRZ_ACK) is set, no further action is required. Skip steps 5 to 8.
5. If the timeout is reached because the Freeze Mode Acknowledge bit (FRZ_ACK) is still cleared, then set the Soft Reset bit (SOFTRST) in MCR.
6. Poll the MCR register until the Soft Reset bit (SOFTRST) bit is cleared.
7. Reconfigure the Module Control Register (MCR)
NOTE: The minimum timeout duration should be equivalent to time of longest frame + intermission and internal delay:
~ 140 CAN bits
BR, Petr
