How can I know what is setting the STOPA bit on SMC_PMCTRL?

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How can I know what is setting the STOPA bit on SMC_PMCTRL?

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ivansantanna
Contributor III

I'm still trying to put my KL03 to VLPS mode. After the WFI instruction, I can see the STOP bit set. So, I think that something is aborting the device's stop procedure.
1) Is there some way to know what is aborting it?
2) what's the right status for FTF bit at SIM_SCGC6?

My main problem is that the MCU don't reach low power consuption. I need it working under 10uA, and on VLPS it should drain only 2.2uA.

I'm looking forward some tips...

Thanks and regards...

11 Replies

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Ivan Santanna,

       Except Mark's recommendation, I also have some complement.

    1. Is there some way to know what is aborting it?

   Answer:You need to know why the STOPA is setting, please check the reference manual register description.

pastedImage_1.png

As you know, the VLPS entry need time, but in the entering stage, you have a interrupt or reset happens, the VLPS entry will be failed.

Check your watchdog, did you disable it? watchdog may caused reset.

Another point: interrupt, this may the top reasons caused your STOPA set problem.

Please check your code, what interrupt you are enabling?

You can share me your test project, I would like to help you to check it.

   2.  what's the right status for FTF bit at SIM_SCGC6?

Answer: Just leave it as default, FTF=1.

 Please send me your test project, I will check it on my side. Normally, VLPS should lower than 2.71uA.

 But take care the test point, and test method. The power consumption test points should only contain the MCU consumption, no other external component consumption.

 You can also share us your own board schematic, and tell me your power consumption test point.

Besides, when you test the low power, don't connect the debugger, just download your code to your board.Power off your board, disconnect the debugger, power on your board again, then test the power consumption.

Wish it helps you!


Have a great day,
Kerry

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ivansantanna
Contributor III

The complete project can be found at:

Dropbox - Share 

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ivansantanna
Contributor III

Hello Kerry, thanks for your tips.

Answering your questions, I have LPTMR0 interrupt each 1 second. I don't think that the MCU spend more than 1 sec to goes to STOP mode, do you agree? Thats the only interrupt that is enabled. The whatchdog is disabled, all the ports is disabled, IRQs, TPMs, UARTs, I2C, SPI, everything disabled.
My board has only the MCU, the 100nF capacitor between VCC and VSS, and the SWD connector assembled. All the MCU pins are floating on the board. I'm connecting an external power supply at 2.8Vdc directly on the Vcc point, with a multimeter in serie.
According to the debugger, I'm downloading the code, power it off, removing the debugger and power it on again.
Another comment is: I read in some article that to ensure that the debugger module is off, we must to secure the device. I've checked the FSEC bit at FlashConfig register and the default value is FE (unsecure). I already tried to change it to FF (secure) but the power consuption is still the same.
Attached my simple test code and the schamatics of my board.

Checking with the debuger, I can see the value 0x22 at SMC_PMPROT register, so it's ok. Actually, it's loading before my code starts, but with the same value that I should load.

Another important informatio: when I clear the FTF register before goes to VLPS mode, the current is around 33uA (close to the VLPW current). When I didn't clear this bit, the current is around 190uA (close to Normal Stop current).

I'm looking forward your feedback.

Thanks in advance...

Ivan

Test_circuit.JPG

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Ivan,

Thank you for your detail information.

1.    PTB5 is the NMI pin, you need to add external 4.7K to 10K pull up resistor, please add it at first.

2.    The project link, I can't open it. Please attached it directly, I will test it directly on my board.


Have a great day,
Kerry

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ivansantanna
Contributor III

Hello Kerry,

Finally I found the solution, and I would like to share with you that was trying to solve it with me...

After more that one week reading all the docs, ans, codes, libs, etc... one of the NXP engineers answered me an e-mail that, when I read, I thought: thats the answer. Actually, all the regular documentation don't show the real problem because it's a mask bug. There is an errata (http://www.nxp.com/assets/documents/data/en/errata/KL03Z_1N86K.pdf ) that explain on the topic e8068 the real problem.
Even don't using the RTC, you must set it's clock gate, and then, be sure that it is disabled clearing TCE at RTC_SR and then, write any value to RTC_TSR to clear the bit TIF of RTC_SR.
Look what this errata says:

pastedImage_103.png

T

That's the problem to enter in Low Power Modes!!!

Thank you very much for the patience and I hope to help another NXP users to resolve this problem quickly.

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mjbcswitzerland
Specialist V

Hi Ivan

I am pleased to hear that you found the problem but it shows how much time can be lost on trivial things (meaning project delays and expenses). In the uTasker project I have this for the FRDM-KL03Z:

#elif defined FRDM_KL03Z
    #define MASK_1N86K                            // enable errata workarounds for this mask
    #define PIN_COUNT           PIN_COUNT_24_PIN  // 24 pin QFN
    #define SIZE_OF_FLASH       (32 * 1024)       // 32k program Flash
    #define SIZE_OF_RAM         (2 * 1024)        // 2k SRAM
    #define INTERRUPT_VECTORS_IN_FLASH            // since RAM is limited interrupt vectors are fixed in flash

As you can see, the MASK is specified and automatically enables the appropriate errata workarounds. In this case the full list is:

#elif defined MASK_1N86K
    #define ERRATA_ID_8060   // ROM: bytes sent from host over I2C and SPI interfaces may be lost
    #define ERRATA_ID_8058   // ROM: COP can't be re-enabled in application code due to being disabled by ROM boot code
    #define ERRATA_ID_8086   // ROM: fail to setup connection by UART interface if RX pin is low after POR
    #define ERRATA_ID_8059   // ROM: using UART at 57600 bits/s or greater with a core clock of 8 MHz may cause lost bytes
    #define ERRATA_ID_8068   // RTC: fails to enter low power mode if RTC time invalid flag (TIF) is not cleared after POR
    #define ERRATA_ID_8085   // TPM: writing the TPMx_MOD or TPMx_CnV registers more than once may fail when the timer is disabled

and the workaround automatically switches in as follows:

    #if defined ERRATA_ID_8068 && !defined SUPPORT_RTC // if low power mode is to be used but the RTC will not be initialised clear the RTC invalid flag to avoid the low power mode being blocked when e8068 is present
    POWER_UP(6, SIM_SCGC6_RTC);       // temporarily enable the RTC module
    RTC_TSR = 0;                      // clear the RTC invalid flag with a write of any value to RTC_TSR
    POWER_DOWN(6, SIM_SCGC6_RTC);     // power down the RTC again
    #endif

This is why uTaser users tend to need less than half the time to finish Kinetis projects since it already has solved such issues (before they become issues that lose project time), as well as giving complete code to do the required work without the usual effort.

Regards

Mark

P.S. Open Source uTasker for most Kinetis parts is available at http://www.utasker.com/forum/index.php?topic=1721.msg7086#msg7086



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ivansantanna
Contributor III

Hello Mark,

Yes, it should have been easy to find out the problem... but nobody

mentioned about this mask bug before!

That's the reason for Freedon libs also works on the board, the guys that

wrote the code knew the bug and done all the necessary workarround, but in

my case, I'm using my own board, and I'm not using the RTC, so I did not

study any RTC register up to know.

I'm little bit old programmer, and for me, that comes from assembler, it's

not easy to interpretate codes like uTask or SDK. I'm that kind of

programmer that reads the datasheet and use to config all the usefull

register by my own. So, if this information is not present on the regular

documentation is hard to find...

I think that the NXP(Freescale) engeneers should have know this Errata and

the problems that these bugs can cause, and should have bring us the

answers for these not trivial question faster...

Even if I had seen on your code that includes about the errata, I would

never associate with my problem since I not knew what that errata means...

So man, now the code is almost done... and I'm feeling pretty more light,

because I already have more 500 boards assembled with KL03 and the older

model, that use HCS08 core, is almos over.

Thankyou so much for the help, patiance an support!

Best regards...

2017-03-29 19:18 GMT-03:00 mjbcswitzerland <admin@community.nxp.com>:

NXP Community

<https://community.freescale.com/resources/statics/1000/35400-NXP-Community-Email-banner-600x75.jpg>

Re: How can I know what is setting the STOPA bit on SMC_PMCTRL?

reply from Mark Butcher

<https://community.nxp.com/people/mjbcswitzerland?et=watches.email.thread>

in Kinetis Microcontrollers - View the full discussion

<https://community.nxp.com/message/892035?commentID=892035&et=watches.email.thread#comment-892035>

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mjbcswitzerland
Specialist V

Hi Ivan

In any case, the chip errata is the document that should be read first (before starting programming). This can save time because, although the code may be correct, it may still not work and no matter how much analysis and experiments are done it may still not lead to a solution (which could be explained in one line in the errata once read...)

Regards

Mark

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ivansantanna
Contributor III

Ops, the code...

void MCU_init(void)
{
SIM_COPC = 0; // DESABLE WDOG
SIM_SOPT1 = 0x0C0000; // LPO
SIM_SCGC5 = 1; // CLK do LPTMR0
SIM_CLKDIV1|=(SIM_CLKDIV1_OUTDIV4(3) | SIM_CLKDIV1_OUTDIV1(1));

// SMC_PMPROT = (SMC_PMPROT_AVLP_MASK | SMC_PMPROT_AVLLS_MASK);
SMC_PMPROT = SMC_PMPROT_AVLP_MASK;

}


void enter_vlpr(void)
{
int i;

MCG_MC &= ~0x80; // disable HIRC
SMC_PMCTRL = SMC_PMCTRL_RUNM_VLPR; // muda modo de operaçao para VLP RUN

for (i = 0 ; i < 10000 ; i++){
if (SMC_PMSTAT == 0x04) break; // aguarda sinalização de VLPR
}

}


void enter_vlps(void)
{
volatile unsigned int i;

// SIM_SCGC6 &= ~0x01; // disabling FTF
// Disabling FTF Current = 33uA / Enabling FTF Current = 190uA

SMC_PMCTRL |= SMC_PMCTRL_STOPM_VLPS; // STOP Mode em VLPS

for (i = 0 ; i < 10000 ; i++){
if (SMC_PMCTRL & SMC_PMCTRL_STOPM_VLPS) break; // aguarda sinalização de VLPS
}

SCB_SCR |= SCB_SCR_SLEEPDEEP_MASK; // seta SLEEPDEEP no core ARM para indicar modo STOP

__asm("NOP");
__asm("NOP");
__asm("NOP");

__asm("WFI");

}

void LPTMR_Init(void){

NVIC_ICER = ~NVIC_ICER_CLRENA28_MASK; // Clear All Interrupt Enable except LPTMR0 (28)
NVIC_ISER = NVIC_ISER_SETENA28_MASK; // Set LPTMR Interrupt Enable

SIM_SCGC5 |= SIM_SCGC5_LPTMR_MASK; // Enabling Clock Gate for LPTMR0
LPTMR0_CSR = 0x80;
LPTMR0_CMR = 249; // INT each 1 sec
LPTMR0_CSR = 0x40; // Interrupt Enabling
LPTMR0_PSR = 0x09; // LPO 1KhZ dIV 4
LPTMR0_CSR |= 0x80; // Clear Int Pending
LPTMR0_CSR |= LPTMR_CSR_TEN_MASK; // Timer Enable

}

void PortInit(void){


SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK;

// PORTA_PCR0 = PORT_PCR_MUX(1);
// PORTA_PCR1 = PORT_PCR_MUX(1);
// PORTA_PCR2 = PORT_PCR_MUX(1);
// PORTA_PCR3 = PORT_PCR_MUX(1);
// PORTA_PCR4 = PORT_PCR_MUX(1);
PORTA_PCR5 = PORT_PCR_MUX(1);
PORTA_PCR6 = PORT_PCR_MUX(1);
// PORTA_PCR7 = PORT_PCR_MUX(1);

GPIOA_PDDR |= 0xFF;
GPIOA_PDOR = 0x00;

/*
SIM_SCGC5 |= SIM_SCGC5_PORTB_MASK;

PORTB_PCR0 = PORT_PCR_MUX(1) | PORT_PCR_DSE_MASK;
PORTB_PCR1 = PORT_PCR_MUX(1) | PORT_PCR_DSE_MASK;
PORTB_PCR2 = PORT_PCR_MUX(1) | PORT_PCR_DSE_MASK;
PORTB_PCR3 = PORT_PCR_MUX(1) | PORT_PCR_DSE_MASK;
PORTB_PCR4 = PORT_PCR_MUX(1) | PORT_PCR_DSE_MASK;
PORTB_PCR5 = PORT_PCR_MUX(1) | PORT_PCR_DSE_MASK;

GPIOB_PDDR |= 0x04;
GPIOB_PDOR = 0x00;
*/

}
void main(void)
{

/* Write your code here */

MCU_init(); //Busclk = 8Mhz/2 /2 /4= 500K
enter_vlpr();
PortInit();
Time = 0;
LPTMR_Init();
while(1){
enter_vlps();

__asm("NOP");

GPIOA_PTOR = 0x20; // TOOGLE NO PINO A5

if (SMC_PMCTRL & SMC_PMCTRL_STOPA)
GPIOA_PTOR = 0x40;

}

}


void LPTMR0_IRQHandler (void){
// Base de tempo em 50ms
LPTMR0_CSR |= 0x80; // limpa pendencia da int
// Eventos de intervalo 1 segundo
Time++;

}

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mjbcswitzerland
Specialist V

Ivan

KL03 to VLPS is

        SMC_PMPROT |= SMC_PMPROT_AVLP;
        SMC_PMCTRL = (SMC_PMCTRL_RUNM_NORMAL | SMC_PMCTRL_STOPM_VLPS | SMC_PMCTRL_LPWUI);
        SYSTEM_CONTROL_REGISTER |= SLEEPDEEP;
       _wfi():

Check your use of SMC_PMPROT since it is "write-once" and so if you have already written it before it won't accept any further writes.

Regards

Mark


Professional support for Kinetis: http://www.utasker.com/index.html
Remote desktop one-on-one coaching: http://www.utasker.com/services.html
Getting started to expert videos: https://www.youtube.com/results?search_query=utasker+shorts

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ivansantanna
Contributor III

Hello Mark, 

I'm still disturbing you with my problem... thanks a lot for your patience...

That's what I'm doing except for the SMC_PMCTRL_LPWUI... What's is this bit? It's not covered by the Reference Manual...

pastedImage_1.png

Actually I'm setting the RUN mode also for VLPR.

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