I would like to use i.MX7 SPI output at the highest bit rate possible.
according to spec & errata, I need to send packets of up to 32bit with stops between packets of at least half the clock period (CS4 according to datasheet).
is it possible to implement it with SCLK period of 20nsec? that CS4 will be 10nsec? does the CPU able to produce this kind of data streaming?
I want to implement a serial data path (write only) that needs to have a bit rate of at least 40Mbit/sec.