IMX6UL Processor GPIO enabling issue

[ramesh6663]

Hi,

 We are using IMX6UL processor in our design, we are facing the issues in GPIO1_IO01(L15), GPIO1_IO02(L14) to enable and disable operation. We measured voltages when configured this pin as a GPIO as Logic '0' = 0.3V, Logic '1' =0.7V instead of 3.3V logic levels. These GPIO signals directly goes to connector and not shared to any other device.

Following are the checking done:

1. In software Device tree is configured fine as per our understanding (we make sure it using point 4).

2. we suspect BGA pins L14, L15  very closer so solder short, ball get damage,Assembly issue. we tried BGA Xray and checked its fine no issue.

3. Our PCB Layout design we confirmed no issue for these 2 pins.

4. we configured GPIO1_IO05, GPIO1_IO06 , GPIO1_IO07 as GPIO and we are getting Logic '0' = 0.2V and Logic '1' = 3.25V instead of 3.3V. So its fine

Following are the Queries:

1. We are using silicon version 1.1 processor which has fixed all errata in Version1.0. If this version 1.1 has any errata issue related to GPIO blocks?

2. If possible please provide us the Device tree configuration examples which we will cross check in our design?

3. Please suggest us any prediction from your end based on the deatails which I have mentioned above?

Thanks & Regards,

Rameshkumar

[igorpadykov]

Hi Rameshkumar

if this is one board this may be quality issue and one can try to resolder other chip.

Most simple way is to attach jtag debugger or write from uboot (using mw command) directly to

gpio registers. There are no known processor gpio errata.

Best regards
igor
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[ramesh6663]

Hi Igor,

Thanks for your quick reply. we will check through JTAG and get beck to you shortly.

Thanks & Regards,

Rameshkumar