Hi guys,
I am using FRDM K64 in MQX to read 32 values from ADC and find the avaerage of it using DMA.But i am not getting any reading at the buffer. when read from DMA.
This is my DMA setting.
void Set_Dma(void)
{
// setup the DMA channels ( CH0 = playback and CH1 = buffer transfer )
DMA_CR = 0
| DMA_CR_EDBG_MASK // Stall DMA transfers when debugger is halted (avoid noise)
; // no minor loop mapping
DMA_DCHPRI15 = 0; // just not to have same priorities
DMA_DCHPRI0 = 15; // cannot be pre-empeted, can pre-empt, highest priority
// fill the TCD area
DMA_TCD0_SADDR = (uint32_t)&ADC0_RA ;
DMA_TCD0_SOFF = 0; // 2 byte offset
DMA_TCD0_ATTR = DMA_ATTR_SMOD(0) | DMA_ATTR_SSIZE(1) | DMA_ATTR_DMOD(0) | DMA_ATTR_DSIZE(1); // no circular addressing S&D, 16 bit S&D
DMA_TCD0_NBYTES_MLNO = 2; // one 16bit sample every minor loop
DMA_TCD0_SLAST = 0;//-(DMA_BUF_SIZE*2); // source address will always be newly written before each new start DMA_TCD0_DADDR
DMA_TCD0_DADDR = (uint32_t) &BufferSource_A[0]; // the FTM Channel 0 duty value
DMA_TCD0_DOFF = 2;
DMA_TCD0_CITER_ELINKNO = DMA_BUF_SIZE; // total samples ( 32 )
DMA_TCD0_DLASTSGA = -64;
DMA_TCD0_CSR = DMA_CSR_INTMAJOR_MASK ; // interrupt when done
DMA_TCD0_BITER_ELINKNO = DMA_BUF_SIZE;
// configure DMA_MUX to trigger DMA channel 0 with FTM2 CH1
Set_Dma_Mux();
// now enable chan0 for HW triggers
DMA_ERQ = DMA_ERQ_ERQ0_MASK ;
// Install DMA0 Major loop complete IRQ
_int_install_isr(INT_DMA0, dma_ch0_isr, NULL);
//_cortex_int_init(INT_DMA0, 3, TRUE);
_nvic_int_init(INT_DMA0, 3, TRUE);
}
Can anyone tell me what is wrong in this??
Tanks and Regards,
Olivia
