I have my first (test) board with the LPC54608 on my desk now. The board includes 8 MByte of SDRAM (x16 bit) and a NAND Flash (x8 bit) among other things.
The SDRAM works as it should, it passes various test patterns etc so I know that the interface for that one is working.
I also have a ST NAND256 Flash device mounted.
The EMC-WE (P0.15) signal is connected both to the SDRAM (WE#) and the NAND Flash (WE#).
The EMC-CSN0 (P0.16) signal is connected to the NAND Flash as chip select.
(EMC-OE (P0.17), EMC-A18 (P3.29), EMC-A19 (P3.30) are connected to NAND Flash (R#, AL, CL))
The problem I see is that if I configure the Static memory controller 0 (CS0) and makes read access to address 0x80000000 and upwards, I see activity on the EMC-CSN0 and EMC-OE as expected. However, if I do write requests to the same area, I only see the EMC-CSN0 toggling and no activity on the EMC-WE pin.
(and remember, the SDRAM works fine, EMC-WE toggles nicely when accessing SDRAM)
Is there something specific I need to be aware of when dealing with static memory on the EMC bus of the LPC54608 especially with regards to the EMC-WE signal ?
The clock is set to 180 MHz
The init code for the static memory (I know, not pretty at the moment )
(Contents of the registers of the EMC static memory controller verified with Keil debugger)
/* Init EMC Controller -Enable-LE mode */
Chip_EMC_Init(LPC_EMC, 1, 0, 0);
/* Init EMC Dynamic Controller */
// Chip_EMC_Dynamic_Init(LPC_EMC, &IS42S16400_config, Chip_Clock_GetEMCRate());
LPC_EMC_T *EMC_Reg_add = (LPC_EMC_T *) ((uint32_t) LPC_EMC + ((0) << 5));
EMC_Reg_add->STATICCONFIG0 = 0;
EMC_Reg_add->STATICWAITWEN0 = 2;
EMC_Reg_add->STATICWAITOEN0 = 2;
EMC_Reg_add->STATICWAITRD0 = 8;
EMC_Reg_add->STATICWAITPAG0 = 0x1F;
EMC_Reg_add->STATICWAITWR0 = 8;
EMC_Reg_add->STATICWAITTURN0 = 0x0f;
LPC_SYSCON->EMCSYSCTRL= (1<<0) | (1<<2);