We are using the QorIQ T1042RDB eval board, implementing a PTP2 Master using the DPAA1588 Timer Module. Got it working with a PTP Slave (running ptp4l/RHEL), and we see good results - +/- <100nsec. That is good. The question here relates to our intended use of the TMROFF_H/L registers to synchronize our Master's clock with the time we receive via an FPGA Time at the Tone messaging/strobe interface. We want to keep T1042 s/w from directly adjusting the time via setting the TMR_CNT_H/L as much as possible and our reading of the TMR_OFFSET suggests this would help do that.
Setting up DPAA 1588 Timer Module to do this, looking in the QorIQ-SDKv2.0 kernel driver, here:
My question is : Why is there not an ioctl interface for the TMROFF_H/L registers here too? I find where the driver code sets the offset registers (..../ethernet/freescale/sdk_fman/...), but looking thru the driver I cannot see anybody calling that code (other than setting it to 0 in init routines). I wrote a test appl (using /dev/mem) to set the TMROFF_H/L registers, and sure enough I see from the reaction on the PTP Slave that setting the offset worked, in that the slave's PTP (RHEL's ptp4l) notices that the PTP protocol timestamps jumped. So I figure that the DPAA network interface's h/w timestamping *is* using the TMR_OFFSET, as specified in the T1040DPAARM.pdf,
Would like to get an idea that we are on the right track here - eg, can we just plan to make driver changes to add this TMROFF ioctl? Or is there some reason it is not there and we should avoid doing it? Any reason it is not there already?
Thanks for any help,