We have a T1042 design and plan to boot from NOR flash (16 bit wide). The size of the NOR flash is 32MB. If the NOR device is connected to CS0 and mapped to the top of memory space (0xFE00_0000 - 0xFFFF_FFFF) there will be an overlap with the default 16MB CCSR register space (0xFE00_0000 - 0xFEFF_FFFF). As we see it we have two options:
1. Move the CCSR register space by changing the base address of this address space to say 0xA000_0000-0xA0FF_FFFF) and map the NOR flash at 0xFE00_0000 - 0xFFFF_FFFF or
2) Map the NOR flash to say 0xA000_0000 - A1FF_FFFF and leave the CCSR space at the default.
We understand that the device boots at 0xFFFF_FFFC and all accesses will hit CS0 until the AMASK0 register is written. So effectively the instructions at boot are being read from the upper part of the NOR flash connected to CS0 until AMASK0 is written to set the address. We also understand that there is an 8MB default boot window that the processor is expecting to be booted into 0xF800_0000 - 0xFFFF_FFFF and there is a 4KB window mapped by the processor to run the init code from at 0xFFFF_F000 - 0xFFFF_FFFF. We start executing at 0xFFFF_FFFC and there is a jump instruction to the init code at 0xFFFF_F000. The init code could then setup the NOR flash addressing in scenario 2.
So the question is which method is preferred or with either work? Would scenario 2 need boot space translation as defined in Section 4.3.3 or will simply changing the CSPR0_EXT, CSPR0 and AMASK0 suffice to move the NOR flash address range.
In scenario 1, could the CCSR BASE address be changed in PBI instructions such that no core is executing and when the first instruction is fetched from the NOR device connected to CS0, the CCSR BASE is already moved and then the init code could setup the CSPR0_EXT, CSPR0 and AMASK0 registers for 0xFE00_0000 and 32MB in size and LAW registers for both the NOR flash and relocated CCSR address range?
In scenario 2, to relocate the NOR flash is it as simple as having the init code change the CSPR0_EXT, CSPR0 and AMASK0 to 0xA000_0000 and 32MB without any boot address translation. We are assuming a LAW would also need to be setup for this address area.
Are there any drawbacks to either approach especially if the Secure and Trust architecture is used?
Thanks in advance.