AnsweredAssumed Answered

i.MX6solo Gated Mode phase question.

Question asked by Takashi Takahashi on Mar 13, 2017
Latest reply on Mar 13, 2017 by igorpadykov
Dear community.
Our customer has question below.
In the following figure of 37.4.3.6.1  of i.MX6SDL Reference manual, data reading is done at the falling edge of clock,
Can it be read at the rising edge of clock?
Is there a function to invert the clock latch phase?
Data sheet of IMX6SDLAEC described on page 94, it is rising edge, which is collect?

Outcomes