[MPC5777M]Unable to write to FlexRay registers

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[MPC5777M]Unable to write to FlexRay registers

744 Views
umabk
Contributor III

Hi,

We are unable to write to the following Message Buffer registers for FlexRay in the MPC777M EVB:

FR_MBIDXRn
FR_MBCCFRn

 

We make sure that both conditions for writing to these registers: POC:config and MB_DIS are fulfilled.
We are able to write to FR_MBFIDRn and also set the appropriate bits in FR_MBCCSRn.

From the attached fr.c file, the functions are called in the following order:

  1. flexray_pin_configuration() -- Configuring the pins
  2. Fr_init()  -- This function configures the CC, enables the FlexRay module and then commands the CC to transition to the POC:Config state via the FR_POCR register
  3. Fr_set_configuration() -- Configures the protocol engine via FR_PCRn registers
  4. Fr_buffers_init() -- Configures the message buffers (this where we face the register write problem). Before attempting the write, we check the EDS bit in the FR_MBCCSRn register to make sure MB_DIS is satisfied.
  5. Fr_leave_configuration_mode() -- Exits POC:Config mode and wait for POC:Ready

 

Are there any further requirements we missed?

Original Attachment has been moved to: fr.c.zip

2 Replies

577 Views
umabk
Contributor III

Turns out that the problem was caused by a memory misalignment issue in the FR registers starting with the first 32 bit register. The problem was fixed by fixing the alignment using a #pragma pack() directive.

577 Views
Daniel_Wax
NXP Employee
NXP Employee

From the fr.c file  the functions are called in the following order:

  1. flexray_pin_configuration() -- Configuring the pins
  2. Fr_init()  -- This function configures the CC, enables the FlexRay module and then commands the CC to transition to the POC:Config state via the FR_POCR register
  3. Fr_set_configuration() -- Configures the protocol engine via FR_PCRn registers
  4. Fr_buffers_init() -- Configures the message buffers (this where we face the register write problem). Before attempting the write, we check the EDS bit in the FR_MBCCSRn register to make sure MB_DIS is satisfied.
  5. Fr_leave_configuration_mode() -- Exits POC:Config mode and wait for POC:Ready
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